Modeling redundancy in 64K to 16Mb DRAMs

Publisher Website

1 January 1983

proceedings article
Published by Institute of Electrical and Electronics Engineers (IEEE)

p. 86-87
https://doi.org/10.1109/isscc.1983.1156446

Abstract

No abstract available

Keywords

This publication has 2 references indexed in Scilit:

A simple method for modeling VLSI yields
Solid-State Electronics, 1982
Yield Model for Productivity Optimization of VLSI Memory Chips with Redundancy and Partially Good Product
IBM Journal of Research and Development, 1980