A taxonomy of programming models for symmetric multiprocessors and SMP clusters

19 November 2002

conference paper
Published by Institute of Electrical and Electronics Engineers (IEEE)

p. 2-7
https://doi.org/10.1109/pmmpc.1995.504335

Abstract

The basic processing element, from PCs to large systems, is rapidly becoming a symmetric multiprocessor (SMP). As a result, the nodes of a parallel computer will often be an SMP. The resulting mixed hardware models (combining shared-memory and distributed memory) provide a challenge to system software developers to provide users with programming models that are portable, understandable, and efficient. This paper describes and compares a variety of programming models for a parallel computer made up of SMP nodes.

Keywords

TAXONOMY
YARN
CONCURRENT COMPUTING
WORKSTATIONS
HARDWARE
PARALLEL PROGRAMMING
SWITCHES
COUNTING CIRCUITS
MATHEMATICS
COMPUTER SCIENCE

This publication has 1 reference indexed in Scilit:

Monitors, messages, and clusters: The p4 parallel programming system
Parallel Computing, 1994