Theory of Single Event Latchup in Complementary Metal-Oxide Semiconductor Integrated Circuits
- 1 January 1986
- journal article
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Transactions on Nuclear Science
- Vol. 33 (6) , 1714-1717
- https://doi.org/10.1109/tns.1986.4334671
Abstract
A new theory of single event latchup in complementary metal-oxide semiconductor (CMOS) integrated circuits is described. The temperature effect on both cross section and critical linear energy transfer (LET) is explained. The latchup cross section is related to a characteristic length, which is based on the lateral transistor parameters. In this way, the large increase in cross section with temperature is explained. The LET threshold is dependent on the depletion width of the n-substrate p-well junction, which is relatively independent of temperature.Keywords
This publication has 5 references indexed in Scilit:
- Numerical Studies of Charge Collection and Funneling in Silicon DeviceIEEE Transactions on Nuclear Science, 1984
- Simulation of Cosmic-Ray Induced Soft Errors and Latchup in Integrated-Circuit Computer MemoriesIEEE Transactions on Nuclear Science, 1979
- Latch-Up in CMOS Integrated CircuitsIEEE Transactions on Nuclear Science, 1973
- Radiation-Induced Integrated Circuit LatchupIEEE Transactions on Nuclear Science, 1969
- Radiation Induced Regeneration through the P-N Junction Isolation in Monolithic I/C'sIEEE Transactions on Nuclear Science, 1965