Validating the Intel/sup (R)/ Pentium/sup (R)/ 4 microprocessor

Publisher Website

13 November 2002

conference paper
Published by Institute of Electrical and Electronics Engineers (IEEE)

https://doi.org/10.1109/dsn.2001.941434

Abstract

No abstract available

Keywords

This publication has 3 references indexed in Scilit:

Functional verification methodology for microprocessors using the Genesys test-program generator. Application to the x86 microprocessors family
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Architecture validation for processors
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Bugs Are Good: A Problem-Oriented Approach To the Management of Design Engineering
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