Novel VLSI implementation of (8×8) point 2-DDCT
- 14 April 1994
- journal article
- Published by Institution of Engineering and Technology (IET) in Electronics Letters
- Vol. 30 (8) , 624-626
- https://doi.org/10.1049/el:19940423
Abstract
An innovative, high performance, bit serial architecture for the (8×8) point 2-D DCT, which is suitable for video telephony applications, is presented. The architecture has been derived by the novel application of a previously developed fast algorithm.Keywords
This publication has 4 references indexed in Scilit:
- A DCT chip based on a new structured and computationally efficient DCT algorithmPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2002
- An all-ASIC implementation of a low bit-rate video codecIEEE Transactions on Circuits and Systems for Video Technology, 1992
- Fast algorithms for the discrete cosine transformIEEE Transactions on Signal Processing, 1992
- DISCRETE COSINE TRANSFORMPublished by Elsevier ,1990