Design possibilities for photodiode arrays with integral silicon-gate scan generators

1 January 1971

conference paper
Published by Institute of Electrical and Electronics Engineers (IEEE)

Vol. XIV, 130-131
https://doi.org/10.1109/isscc.1971.1154996

Abstract

A RECENTLY-DESCRIBED single-dimension self-scanning photodiode array has been seminal to a growing number of modified structures for a variety of applications. The MOS shift register, which controls array scanning, has in particular demonstrated considerable versatility and applicability for different array designs. This paper will discuss the tradeoffs in shift register and photodiode structure which set the limits on array performance.

Keywords

PHOTODIODES
SENSOR ARRAYS
SHIFT REGISTERS
CLOCKS
FETS
CAPACITANCE
IMPEDANCE
SAMPLING METHODS
DIODES
CHARGE TRANSFER

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