Use of sample-and-hold delay circuits for synthesis of raised-cosine filters
- 1 January 1974
- journal article
- Published by Institution of Engineering and Technology (IET) in Proceedings of the Institution of Electrical Engineers
- Vol. 121 (3) , 169-172
- https://doi.org/10.1049/piee.1974.0030
Abstract
A new technique is described in which f.e.t. sample-and-hold delay circuits are used to shape a square-wave digital pulse into a pulse whose spectrum approximates to a raised-cosine spectrum with 100% roll off. The technique, which is entirely digital, is examined both theoretically and experimentally, and it is found that the raised-cosine spectrum can be synthetised simply, and to a high degree of accuracy. The technique is easier to implement than methods based on conventional network synthesis.Keywords
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