Complementary metal-oxide-silicon field-effect transistors fabricated in 4-MeV boron-implanted silicon
- 1 November 1984
- journal article
- research article
- Published by AIP Publishing in Applied Physics Letters
- Vol. 45 (9) , 977-979
- https://doi.org/10.1063/1.95470
Abstract
Boron was implanted into p‐type (100) silicon at an energy of 4 MeV to create a layer of heavily doped silicon centered at a depth of 5.2 μm below the surface. Both n‐channel and p‐channel metal‐oxide‐silicon, field‐effect transistors (MOSFET’s) and various diode structures were fabricated over this implanted region by using a 3‐μm complementary MOSFET (CMOS) technology. The results show that the implanted silicon is recrystallized to a device quality state. No increase in diode leakage or degradation in MOSFET device characteristics is observed. Experimental results show that this subdevice buried layer leads to a reduction of CMOS latch‐up susceptibility.Keywords
This publication has 2 references indexed in Scilit:
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- Latch-Up in CMOS Integrated CircuitsIEEE Transactions on Nuclear Science, 1973