We developed a technology to fabricate enhancement and depletion high electron mobility transistors (E- and D-HEMTs) with sub-0.5 µm gatelengths using e-beam direct-write lithography. The gates are recessed by dry etching. The recess is stopped on 30 Å AlGaAs layers for E- and D-field effect transistors (FETs) respectively. We have extensively investigated the double layer resist technique for direct-write to improve the reliability of 0.3 µm electron-beam (E-beam) lithography. Ring oscillators using direct coupled FET logic (DCFL) have been measured indicating delay times of 16 ps per stage.