Sub-10-ps gate delay by reducing the current crowding effect at an extension
- 23 November 2002
- proceedings article
- Published by Institute of Electrical and Electronics Engineers (IEEE)
- p. 239-242
- https://doi.org/10.1109/iedm.1997.650363
Abstract
No abstract availableThis publication has 2 references indexed in Scilit:
- A low-resistance self-aligned T-shaped gate for high-performance sub-0.1-μm CMOSIEEE Transactions on Electron Devices, 1997
- Analysis of the gate-voltage-dependent series resistance of MOSFET'sIEEE Transactions on Electron Devices, 1986