A 0.4 µm Gate-All-Around TFT (GAT) Using a Dummy Nitride Pattern for High-Density Memories

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Abstract
We propose a novel thin-film-transistor (TFT) structure named gate-all-around TFT (GAT). Its fabrication process is very simple, in that we realize the gate-all-around structure using only a dummy nitride pattern. The GAT shows high channel conductance and features of shield structure peculiar to the double-gate structure. It can also eliminate an anomalous leakage current which appears in the sub-half-micron regime. Combining this process with sacrifice oxidation of the channel poly-Si, we obtained a GAT whose performance is nearly equal to that of single-crystalline metal-oxide-semiconductor field-effect transistors (MOSFETs). Since the GAT requires only one additional mask layer and no increase in TFT area as compared with the conventional single-gate TFT, it is suitable for a high-density and low-cost static-random-access-memory (SRAM). SRAM cells with this GAT have the potential to exhibit performance equivalent to that of the full-complimentary-MOS (CMOS) cell.

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