Analysis and design of CMOS broadband amplifier with dual feedback loops
- 25 June 2003
- proceedings article
- Published by Institute of Electrical and Electronics Engineers (IEEE)
Abstract
We present a broadband amplifier with 10.5dB gain and a 3dB bandwidth of 1.7GHz using CMOS 0.25μm process in this paper. The technique of dual feedback loops was used in the amplifier for terminal impedance matching. Derived formulas for voltage gain (or S21), input return loss(or S11), output return loss (or S22) as well as transimpedance gain with open load and 50 Ω load (or Z21 and ZT) have been used for the analysis and design of this amplifier. This circuit only dissipates 25 mW dc power.Keywords
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