Large memory embedded ASICs

6 January 2003

conference paper
Published by Institute of Electrical and Electronics Engineers (IEEE)

p. 292-295
https://doi.org/10.1109/iccd.1988.25709

Abstract

Application-specific integrated circuits (ASICs) with high-performance embedded memory array with suitable design route have considerable merits in terms of system speed, scalability with technology and system cost. The choice of design approach according to applications is critical. For highly memory-rich applications, one of the recently developed memory ASICs, an integrated cache memory is described. Another example suited for large-size random logic and high-density memory is a structure array approach. A recently developed 72 K track-free gate array with 1 Mb DRAM is described.<>

Keywords

APPLICATION SPECIFIC INTEGRATED CIRCUITS
RANDOM ACCESS MEMORY
COSTS
CACHE MEMORY
DESIGN METHODOLOGY
DESIGN ENGINEERING
SCALABILITY
LOGIC ARRAYS
LOGIC DESIGN
SEMICONDUCTOR DEVICES

This publication has 1 reference indexed in Scilit:

A circuit design of 32Kbyte integrated cache memory
Published by Institute of Electrical and Electronics Engineers (IEEE) ,1988