A fine-line NMOS 3-Gbit/s 12 channel time-division multiplexer-demultiplexer chip set

This publication has 5 references indexed in Scilit:

• A 4Gb/s GaAs 16-1multiplexer/1-16demultiplexer LSI
  Published by Institute of Electrical and Electronics Engineers (IEEE) ,1988
• A high speed GaAs 8-bit multiplexer using capacitor-coupled logic
  IEEE Journal of Solid-State Circuits, 1983
• A GaAs MSI word generator operating at 5 Gbits/s data rate
  IEEE Transactions on Electron Devices, 1982
• MSI High-Speed Low-Power GaAs Integrated Circuits Using Schottky Diode FET Logic
  IEEE Transactions on Microwave Theory and Techniques, 1980
• Delay-time optimization for driving and sensing of signals on high-capacitance paths of VLSI systems
  IEEE Transactions on Electron Devices, 1979