Optimization of GaAs MESFET logic gates with subnanosecond propagation delays
- 1 August 1979
- journal article
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Journal of Solid-State Circuits
- Vol. 14 (4) , 708-715
- https://doi.org/10.1109/jssc.1979.1051248
Abstract
No abstract availableThis publication has 8 references indexed in Scilit:
- Low power GaAs digital ICs using Schottky diode-FET logicPublished by Institute of Electrical and Electronics Engineers (IEEE) ,1978
- Bias dependence of GaAs and InP MESFET parametersIEEE Transactions on Electron Devices, 1977
- GaAs MESFET logic with 4-GHz clock rateIEEE Journal of Solid-State Circuits, 1977
- Planar GaAs integrated circuits fabricated by ion implantationPublished by Institute of Electrical and Electronics Engineers (IEEE) ,1977
- Microwave Field-Effect Transistors - 1976IEEE Transactions on Microwave Theory and Techniques, 1976
- High-speed GaAs MSIPublished by Institute of Electrical and Electronics Engineers (IEEE) ,1976
- High-speed integrated logic with GaAs MESFET'sIEEE Journal of Solid-State Circuits, 1974
- Si and GaAs 0.5 μ m-gate Schottky-barrier field-effect transistorsElectronics Letters, 1973