A high bandwidth superscalar microprocessor for multimedia applications

20 January 2003

conference paper
Published by Institute of Electrical and Electronics Engineers (IEEE)

p. 258-259
https://doi.org/10.1109/isscc.1999.759231

Abstract

This 250 MHz 2-way superscalar MIPS-compatible embedded microprocessor is targeted for use in high-end consumer electronics, game, and network markets. The microprocessor features a high-bandwidth (2.0 GB/s peak) 128 b external bus. Internal datapaths and load/store paths to and from the caches are also 128 b wide. Numerous functional enhancements are incorporated, including a 128 b SIMD instruction set for multimedia support, an integrated scratchpad RAM (SPRAM), and a comprehensive set of debug and performance counting facilities.

Keywords

BANDWIDTH
MICROPROCESSORS
PIPELINES
DRIVER CIRCUITS
COPROCESSORS
APPLICATION SOFTWARE
COMPUTER NETWORKS
EMBEDDED COMPUTING
CONSUMER ELECTRONICS
GAMES

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