The thermal modeling of integrated-circuit device packages

1 September 1987

journal article
Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Transactions on Electron Devices

Vol. 34 (9) , 1934-1938
https://doi.org/10.1109/T-ED.1987.23178

Abstract

Heat elimination from power integrated-circuit packages represents an ever present problem due to the highdegree of dissipation of energy emitted from high-voltage devices. An important consideration in the removal of large quantities of heat is the choice of material for the heat sink and its geometric configuration. The amount of copper used as a heat sink is limited by economic factors. An engineering model has been developed to estimate the dimensions of the heat sink based on a simple one-dimensional multilayer steady-state heat transport model. The model shows that the transport of energy from the heat sink to the ambient is a weak function of the thickness. On the other hand, the areal dimensions play a major role in the efficiency of heat transfer across the surface. Beyond a ratio of 4 (length/ width), efficiency of heat transport is not measurably increased. A transient analysis was included to see if time dependencies influenced the progress of heat flow.

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