Room-temperature and low-pressure nanoimprint lithography
- 31 July 2002
- journal article
- Published by Elsevier in Microelectronic Engineering
- Vol. 61-62, 371-377
- https://doi.org/10.1016/s0167-9317(02)00485-9
Abstract
No abstract availableKeywords
This publication has 3 references indexed in Scilit:
- Control of the critical dimension with a trilayer nanoimprint lithography procedureMicroelectronic Engineering, 2001
- Tri-layer systems for nanoimprint lithography with an improved process latitudeMicroelectronic Engineering, 2000
- Imprint of sub-25 nm vias and trenches in polymersApplied Physics Letters, 1995