Scaling Down MNOS Nonvolatile Memory Devices
- 1 January 1982
- journal article
- Published by IOP Publishing in Japanese Journal of Applied Physics
- Vol. 21 (S1)
- https://doi.org/10.7567/jjaps.21s1.85
Abstract
Scaling down of MNOS nonvolatile memory devices are presented. Knowledge of operating mechanisms of the electrically alterable nonvolatile memory provides guidelines for choosing the proper thickness of the gate insulating films (Si3N4 and SiO2). It is found that writing time of an MNOS device depends on the nitride thickness alone but not on the oxide thickness, while erasing time depends on the thicknesses of both films. A 10-V programmable scaled down MNOS memory device is realized by decreasing nitride thickness from 50 nm to 19.5 nm and keeping oxide thickness almost constant at about 2.1 nm. Experimental devices are shown to be highly reliable, if the Si3N4 is slightly oxidized, resulting in an MONOS structure.Keywords
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