Two approaches to increasing spurious free dynamic range in high speed DACs

1 January 1993

conference paper
Published by Institute of Electrical and Electronics Engineers (IEEE)

p. 80-83
https://doi.org/10.1109/bipol.1993.617474

Abstract

The authors describe two BiCMOS approaches to DAC design which have resulted in improved frequency domain performance for direct digital synthesis in the 20 to 50 MSPS range. Improvements of 10 to 20 dB in the spurious free dynamic range of the DACs was achieved. A novel approach to DAC switch design has resulted in improved frequency domain performance. Use of the new switch in a BiCMOS 16-b DAC has achieved a SFDR of greater than 80 dB. A single supply 50 mWatt BiCMOS 12-b DAC design with on-chip de-glitching has resulted in improvements of up to 20 dB in the SFDR.

Keywords

DIGITAL-ANALOG CONVERSION

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