Rapid Annealing in Silicon Transistors
- 1 January 1968
- journal article
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Transactions on Nuclear Science
- Vol. 15 (6) , 84-87
- https://doi.org/10.1109/tns.1968.4325035
Abstract
Rapid annealing data after a pulse of reactor neutrons for seven NPN planar transistors at room temperature and the 2N1613 at various temperatures down to dry ice were interpreted in terms of the motion of a single type of mobile defect. An equation was derived for the recombination of the defect with fixed defects in a spherical cluster and the subsequent diffusion of the defect outside the cluster. This treatment leads to an identification of two stages of annealing, with a transition time between stages at room temperature of a few milliseconds. The variation in the transition time with temperature for the 2N1613 is used to derive an activation energy of (0.28 ± 0.02) eV, which agrees, within error, with that for the vacancy in p-type silicon. A calculation of the cluster radius is in reasonable agreement with one-half the primary recoil range.Keywords
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