Tools to speed FPGA development

1 November 1994

journal article
Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Spectrum

Vol. 31 (11) , 88-94
https://doi.org/10.1109/6.328732

Abstract

Users of field-programmable gate arrays (FPGA) can now find easy-to-use development tools with powerful verification and optimization capabilities. The author discusses the features of these design tools. The author discusses logic synthesis and instantiation. The way in which such tools are used is also discussed.

Keywords

FIELD PROGRAMMABLE GATE ARRAYS
LOGIC DESIGN
ELECTRONIC DESIGN AUTOMATION AND METHODOLOGY
LOGIC ARRAYS
PROGRAMMABLE LOGIC ARRAYS
LOGIC FUNCTIONS
SOFTWARE TOOLS
SYSTEM TESTING
GRAPHICS
LIBRARIES

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