A 320 MHz, 1.5 mW at 1.35 V CMOS PLL for microprocessor clock generation
- 23 December 2002
- conference paper
- Published by Institute of Electrical and Electronics Engineers (IEEE)
Abstract
No abstract availableKeywords
This publication has 1 reference indexed in Scilit:
- A PLL clock generator with 5 to 110 MHz of lock range for microprocessorsIEEE Journal of Solid-State Circuits, 1992