Systolic VLSI Arrays for Polynomial GCD Computation

1 August 1984

journal article
Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Transactions on Computers

Vol. C-33 (8) , 731-736
https://doi.org/10.1109/tc.1984.5009358

Abstract

The problem of finding a greatest common divisor (GCD) of any two nonzero polynomials is fundamental to algebraic and symbolic computations, as well as to the decoder implementation for a variety of error-correcting codes. This paper describes new systolic arrays that can lead to efricient VLSI solutions to both the GCD problem and the extended GCD problem.

Keywords

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Systolic VLSI Arrays for Polynomial GCD Computation
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