An FPGA family optimized for high densities and reduced routing delay
- 4 December 2002
- conference paper
- Published by Institute of Electrical and Electronics Engineers (IEEE)
- p. 31.5/1-31.5/4
- https://doi.org/10.1109/cicc.1990.124844
Abstract
The Act-2 family of CMOS field-programmable gate arrays (FPGAs) uses an electrically programmable antifuse and novel architectural and circuit features to obtain higher logic densities while increasing speed and routability. Improvements include: two new logic modules, novel I/O and clock driver circuitry, and more flexible and faster routing paths. New addressing circuitry shortens programming time and speeds complete testing for shorts, opens, and stuck-at faults. Fully automatic placement and complete routing are retrained. Special software tools used for architectural exploration and layout generation are discussed.<>Keywords
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