A family of ADPCM coders implemented on real-time hardware
- 24 March 2005
- conference paper
- Published by Institute of Electrical and Electronics Engineers (IEEE)
- Vol. 12, 964-967
- https://doi.org/10.1109/icassp.1987.1169808
Abstract
Recently, work in ADPCM speech coding has focused on using the adaptive predictors, already included in the coder algorithm, as the basis for noise shaping and post-filtering. This technique is based on improving the perceived quality of the signal -- no actual improvement in signal-to-noise ratio is possible. The original work was performed with an intended application of improving the performance of 16 and 24 kbps ADPCM. We have made extensions of this work for lower bit rates. Specifically we have looked at reducing the sampling rate by use of digital interpolation and at extending the technique to quantization rates as low as one bit per sample. The algorithms we have implemented run at rates in the range of 6 to 16 kbps. The coders below 9 kbps are probably not useful because their quality is too poor, but they do demonstrate the power of the noise shaping and post-filtering concept. The 9, 12 and 16 kbps coders would be useful in applications requiring a low complexity coder with only a single encoding. This paper describes the algorithms, their implementation using the WE (R) DSP32 signal processor, and their performance.Keywords
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