Fault Detection Capabilities of Alternating Logic
- 1 December 1978
- journal article
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Transactions on Computers
- Vol. C-27 (12) , 1093-1098
- https://doi.org/10.1109/tc.1978.1675011
Abstract
This paper details the fault detection capability of a design technique named "alternating logic design." The technique achieves its fault detection capability by utilizing a redundancy in time instead of the conventional redundancy in space and is based on the successive execution of a required function and its dual. In combinational networks the method involves the utilization of a self-dual fumction to represent the required function and the realization of the self dual function in a network with structral properties which are sufficient to guarantee the detection of all single faults. One network structure with sufficient structral properties to detect all single stuck-line faults is the standard AND/OR or OR/AND two-level network [1]. However, other more general combinational logic structures also possess sufficient structural properties. Necessary and sufficient structural properties for any alternating network to be capable of detecting all single faults are derived.Keywords
This publication has 3 references indexed in Scilit:
- On the Existence of Combinational Logic Circuits Exhibiting Multiple RedundancyIEEE Transactions on Computers, 1978
- A Nand Model ror Fault Diagnosis in Combinational Logic NetworksIEEE Transactions on Computers, 1971
- An Algorithm for NAND Decomposition Under Network ConstraintsIEEE Transactions on Computers, 1969