A three‐stage architecture for very large packet switches

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Abstract
This paper proposes a three‐stage broadband packet switch architecture with more than 16,000 ports for a future central office. The switch is constructed by interconnecting many independent switch modules of small size which can be implemented using modifications of various well‐studied switch fabric designs. Channel grouping is used to provide multiple paths for each input‐output pair in order to decrease delay and increase throughput. We show that, for a given size, switch modules with channel grouping are simpler to realize than those without channel grouping. A datagram packet routeing approach is adopted in order to avoid table look‐up that would be required by virtual‐circuit routeing. Ways of preserving the sequence integrity of packets under this situation are presented. Performance analyses show that a 32,768 x 32,768 switch with acceptable performance can be constructed based on switch fabrics of no more than 128 ports.

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