Verifying temporal properties of sequential machines without building their state diagrams

This publication has 5 references indexed in Scilit:

• Formal Boolean manipulations for the verification of sequential machines
  Published by Institute of Electrical and Electronics Engineers (IEEE) ,2002
• Verification of synchronous sequential machines based on symbolic execution
  Published by Springer Nature ,1990
• Sequential circuit verification using symbolic model checking
  Published by Association for Computing Machinery (ACM) ,1990
• Research on Automatic Verification of Finite-State Concurrent Systems
  Annual Review of Computer Science, 1987
• Graph-Based Algorithms for Boolean Function Manipulation
  IEEE Transactions on Computers, 1986