A planarization technology using a bias-deposited dielectric film and an etch-back process
- 1 November 1988
- journal article
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Transactions on Electron Devices
- Vol. 35 (11) , 1829-1833
- https://doi.org/10.1109/16.7393
Abstract
No abstract availableKeywords
This publication has 4 references indexed in Scilit:
- A damage-free perfect planarization method using bias-sputtered SiO2IEEE Transactions on Electron Devices, 1987
- SiO2 planarization technology with biasing and electron cyclotron resonance plasma deposition for submicron interconnectionsJournal of Vacuum Science & Technology B, 1986
- Two‐Layer Planarization ProcessJournal of the Electrochemical Society, 1986
- Study of planarized sputter-deposited SiO2Journal of Vacuum Science and Technology, 1978