High-speed and high-power GaInAsp/InP junction field-effect transistor with submicron gate

9 June 1988

journal article
Published by Institution of Engineering and Technology (IET) in Electronics Letters

Vol. 24 (12) , 733-735
https://doi.org/10.1049/el:19880494

Abstract

Depletion-mode GaInAsP/InP junction field-effect transistors have been fabricated on Fe-doped semi-insulating InP substrates using liquid-phase epitaxial growth techniques. We achieved transconductance of 24 mS (l60mS/mm), drainsource saturation current at an on gate bias of 486mA/mm and current cutoff frequency of 18.8 GHz using a GaInAsP channel layer owing to the gate length reduction.

Keywords

SUBMICRON GATE
TRANSCONDUCTANCE
18.8 GHZ
DRAIN-SOURCE SATURATION CURRENT
GATE LENGTH REDUCTION
INP:FE
DEPLETION MODE
LIQUID-PHASE EPITAXIAL GROWTH
GAINASP-INP TRANSISTOR
JFET
CURRENT CUTOFF FREQUENCY
SHF
24 MS
SI SUBSTRATES
LPE
GAINASP CHANNEL LAYER
JUNCTION FIELD-EFFECT TRANSISTOR

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