Low-temperature polysilicon TFT with two-layer gate insulator using photo-CVD and APCVD SiO/sub 2/
- 1 June 1988
- journal article
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Electron Device Letters
- Vol. 9 (6) , 290-292
- https://doi.org/10.1109/55.720
Abstract
The performance of polysilicon thin-film transistors (TFTs) formed by a 600 degrees C process was improved using a two-layer gate insulator of photochemical-assisted vapor deposition (photo-CVD) SiO/sub 2/ and atmospheric-pressure chemical vapor deposition (APCVD) SiO/sub 2/. The photo-CVD SiO/sub 2/, 100 AA thick, was deposited on polysilicon and followed by APCVD SiO/sub 2/ of 1000 AA thickness. The TFT had a threshold voltage of 8.3 V and a field-effect mobility of 35 cm/sup 2//V-s, which were higher than those of the conventional TFT with a single-layer gate SiO/sub 2/ of APCVD. Hydrogenation by hydrogen plasma was more effective for the new TFT than for the conventional device.<>Keywords
This publication has 1 reference indexed in Scilit:
- Photo‐CVD for VLSI IsolationJournal of the Electrochemical Society, 1984