(Invited) Design Considerations for High Power GTOs

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Abstract
The major difficulty in designing high power GTOs is to increase maximum gate turn-off current I ATO. Undoubtedly, the most determinant factor for I ATO is the current crowding effect during the gate turn-off process. According to a theoretical model and basic experimental results, the p-base layer conductance should be high enough for the excess carrier extraction to occur efficiently. From results for actual whole devices, it was found that I ATO varies proportionally to factor (V J1/ρSPB) for given n-base thickness and resistivity. On the basis of these principles, success was achieved in realizing devices with more than 600 amperes I ATO and from 600 to 2500 volts of forward blocking voltage.

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