A 12ns/350mW 16Kb ECL Compatible RAM

1 September 1985

conference paper
Published by Institute of Electrical and Electronics Engineers (IEEE)

p. 166-176
https://doi.org/10.1109/esscirc.1985.5468055

Abstract

A 12ns/350mw 16Kb ECL compatible RAM with bipolar ECL inpur/output buffers has been developed by using 2μm polyside gate CMOS technology which has bipolar transistors with 3GHz cut-off frequency on the same chip.

Keywords

READ-WRITE MEMORY
CMOS TECHNOLOGY
BIPOLAR TRANSISTORS
CUTOFF FREQUENCY
CMOS LOGIC CIRCUITS
CMOS PROCESS
POWER DISSIPATION
DELAY EFFECTS
CMOS MEMORY CIRCUITS
MOSFETS

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