An ADVANCELL 1.0 mainframe chipset-2.2 million transistors on 11 ICs
- 4 December 2002
- conference paper
- Published by Institute of Electrical and Electronics Engineers (IEEE)
- p. 16.7/1-16.7/4
- https://doi.org/10.1109/cicc.1990.124756
Abstract
A CMOS mainframe chipset of 11 VLSI ICs and a total of 2.2 million transistors aiming at the computing power of previous ECL machines has been developed. The IC design and layout was done by means of proprietary CAD systems using the ADVANCELL 1.0 cell library and high-performance support cells, as well as a special packaging technique. A hierarchical cell-based design methodology was applied by using Siemens tools for schematic capture and layout (VENUS) and a proprietary simulation and verification environment from chip- to system-level (PRIMUS), including automatic test pattern generation, testability rule-checking, and fault simulation.Keywords
This publication has 1 reference indexed in Scilit:
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