A two-residue architecture for multistage ADCs

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Abstract
An architecture for multistage ADCs (analog-to-digital converters) that uses two residue signals to reduce amplifier requirements is described. The residue at any stage in a multistage ADC is the difference between the analog signal and the closest quantization level. A second residue is defined here as the difference between the analog signal and the second closest quantization level. The job of the subsequent stages is to decide where the analog signal lies between these two quantization levels. By passing both residues to subsequent stages, information is propagated about the exact size of the quantization step, because the sum of the two residues is equal to the difference between the two quantization levels (or an LSB of the quantizer). Conceptually, the two residues carry their own reference. The complete 10-b, three-stage pipeline ADC is shown.

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