Maintenance of threshold on-state of an amorphous semiconductor by cw bias: Effects of temperature, frequency, and bias interruption

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Abstract
Threshold chalcogenide switching devices have been maintained in an on‐state using cw functions in conjunction with the original set pulse. The on‐state is distinct from a memory state in that the off‐state can be recovered by lowering the signal amplitude (or frequency) without the need of a high current reset pulse. Once set on, the maintained or preserved on‐state shows no switching discontinuity. Essentially zero current is observed (in either polarity) until a critical voltage level is reached, defined as the barrier voltage, beyond which the current rises almost vertically. The I‐V curve of the preserved on‐state displays its most pronounced temperature dependence at frequencies just above the value at which the device turns off but is relatively temperature independent at significantly higher frequencies (1 MHz and above). The temperature dependence has been investigated near the turn‐off frequency from 500 down to about 20 °K, and consistently shows a maximum in barrier voltage vs ambient temperature at about 35 °K. At room and liquid‐nitrogen ambients, barrier voltage increases superlinearly with decreasing frequency from about 1 MHz to the turn‐off value. With a cw source, the turn‐off which is caused by decreasing frequency appears to be due to allowing a current less than the minimum holding value to persist for a critical time period. Studies of interruptions of the pulse‐switched on‐state show that when the on‐state voltage is forced to zero for a time in excess of about 0.4 μsec the device will turn off. As the interruption time increases, the reswitching voltage also increases until the original threshold is recovered at interruption times of about 1.5 μsec. A similar dependence has been found in the reswitching voltage for interruptions which do not force the on‐voltage to zero but simply reduce it.