Digital system simulation with VHDL in a high-level synthesis system
- 30 September 1992
- journal article
- Published by Elsevier in Microprocessing and Microprogramming
- Vol. 35 (1-5) , 263-269
- https://doi.org/10.1016/0165-6074(92)90326-3
Abstract
No abstract availableKeywords
This publication has 1 reference indexed in Scilit:
- Microprogramming implementation of timed Petri netsIntegration, 1987