An enhanced power meter for SPICE2 circuit simulation
- 1 May 1988
- journal article
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
- Vol. 7 (5) , 641-643
- https://doi.org/10.1109/43.3201
Abstract
An enhancement to a technique presented by S.M. Kang (IEE J. Solid-State Circuits, vol.SC-21, p.889-91, Oct. 1986) for measuring average power dissipation during a SPICE circuit simulation is described. A modified power meter circuit is discussed that allows power measurement during an arbitrary interval of time, holds a constant final value at the end of the sampling interval, and improves the resolution of the technique. Simulation results comparing the modified power meter with the original power meter are presented to verify the modification. An optional modification to provide for a variable power supply voltage is also includedKeywords
This publication has 2 references indexed in Scilit:
- Accurate simulation of power dissipation in VLSI circuitsIEEE Journal of Solid-State Circuits, 1986
- Modeling Time-Dependent Elements for SPICE Transient AnalysesIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 1986