Design of multioperand carry-save adders for arithmetic modulo (2 n +1)
- 17 August 1989
- journal article
- Published by Institution of Engineering and Technology (IET) in Electronics Letters
- Vol. 25 (17) , 1152-1153
- https://doi.org/10.1049/el:19890773
Abstract
We present the design of a multioperand adder for arithmetic modulo (2n+1). Such an adder will be using the carry-saving approach and will mainly consist of a group of full adders operating in parallel.Keywords
This publication has 1 reference indexed in Scilit:
- Complex multiplication using the polynomial residue number systemPublished by Springer Nature ,2006