Hardware/Software co-design of a key point detector on FPGA
- 1 April 2007
- conference paper
- Published by Institute of Electrical and Electronics Engineers (IEEE)
- p. 355-356
- https://doi.org/10.1109/fccm.2007.61
Abstract
The design and implementing of a key point detector on embedded reconfigurable hardware is investigated. The major challenges are efficient hardware/software partitioning of the key point detector algorithm, data flow management as well as efficient use of memory, bus and processor. We present a modular and manual hardware/software co-design, with its implementation on a Xilinx XUP-Virtex II Pro board co-design to solve these issues.Keywords
This publication has 1 reference indexed in Scilit:
- Distinctive Image Features from Scale-Invariant KeypointsInternational Journal of Computer Vision, 2004