Bit-serial realisations of maximum and minimum filters

14 April 1988

journal article
Published by Institution of Engineering and Technology (IET) in Electronics Letters

Vol. 24 (8) , 485-486
https://doi.org/10.1049/el:19880329

Abstract

Efficient bit-serial realisations for maximum and minimum filters are presented. The proposed circuits are simple and suitable for VLSI implementation. The filters not only give the maximum or minimum values, but also indicate which input is the maximum or minimum in an input vector. A true single phase clock has been used to achieve high speed.

Keywords

NONLINEAR TYPE
MAXIMUM FILTERS
SINGLE PHASE CLOCK
VLSI IMPLEMENTATION
MINIMUM FILTERS
HIGH SPEED
DIGITAL FILTERS
CMOS IC
BIT-SERIAL REALISATIONS

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