Memory and logic circuits using semiconductor-barrier Josephson junctions
- 1 January 1977
- journal article
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Transactions on Magnetics
- Vol. 13 (1) , 48-51
- https://doi.org/10.1109/tmag.1977.1059430
Abstract
Theoretical and experimental studies on the use of semiconductor-barrier Josephson junctions in switching circuits are reported. This work includes memory loops as well as latching and nonlatching logic circuits. It has been found previously that the switching time of a single junction (67 ps) is comparable with a similar oxide-barrier junction and that the Q of the junction is considerably lower than the oxide-barrier counterpart, as was predicted theoretically, so cavity resonance effects are nearly absent. The memory loop switching time measured is comparable with those employing oxide-barrier junction. The current experimental work on logic circuits is using semiconductor-barrier junctions as they can be made to give the desired values of the McCumber parameter βcrequired to achieve nonlatching operation. In all cases the junctions used are Pb-Te-Pb sandwich structures.Keywords
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