A 34ns 1Mb CMOS SRAM using triple poly

• 23 March 2005
• conference paper
• Published by Institute of Electrical and Electronics Engineers (IEEE)
• p. 262-263
• https://doi.org/10.1109/isscc.1987.1157108

Abstract

Keywords

• RANDOM ACCESS MEMORY
• READ-WRITE MEMORY
• ARTIFICIAL INTELLIGENCE
• CMOS PROCESS
• MOS DEVICES