An accurate timing model for gate-level simulation of MOS circuits
- 1 January 1991
- proceedings article
- Published by Institute of Electrical and Electronics Engineers (IEEE)
Abstract
No abstract availableThis publication has 4 references indexed in Scilit:
- A timing model for static CMOS gatesPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2003
- MOZART: a concurrent multilevel simulatorIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 1988
- Fast and Coherent Simulation with Zero Delay ElementsIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 1987
- CINNAMON: Coupled Integration and Nodal Analysis of MOS NetworksPublished by Institute of Electrical and Electronics Engineers (IEEE) ,1986