A CMOS automatic line equalizer LSI chip using active-RC filtering
- 1 August 1984
- journal article
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Journal of Solid-State Circuits
- Vol. 19 (4) , 506-509
- https://doi.org/10.1109/JSSC.1984.1052174
Abstract
Using digitally controlled RC-active filtering and a new digital circuit configuration, a CMOS automatic line equalizer LSI has been developed for a digital transmission system. This LSI can automatically equalize line losses of up to 42 dB with 0.2 dB precision even with bridged tap echoes up to two time slots away from the signal pulses, at a transmission rate of up to 200 kb/s. The chip size of 7.0/spl times/7.0 mm is realized through optimized circuit design and double polysilicon CMOS technology. The circuit design concept that permits high-speed operation with high precision and the characteristics of the fabricated LSI are described.Keywords
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