Performance analysis of multibuffered packet-switching networks in multiprocessor systems
- 1 March 1990
- journal article
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Transactions on Computers
- Vol. 39 (3) , 319-327
- https://doi.org/10.1109/12.48863
Abstract
An analytic model and analytic results for the performance of multibuffered packet-switching interconnection networks in multiprocessor systems are presented. The performance of single-buffered delta networks is first modeled using the state transition diagram of a buffer. The model is then extended to account for multiple buffers. The analytic results for multibuffered delta networks are compared to simulation results. The performance of multibuffered data manipulator networks is analyzed to demonstrate the generality of the model.<>Keywords
This publication has 14 references indexed in Scilit:
- Design of a broadcast packet switching networkIEEE Transactions on Communications, 1988
- Design of an Integrated ServicesPacketNetworkIEEE Journal on Selected Areas in Communications, 1986
- The Gamma NetworkIEEE Transactions on Computers, 1984
- Performance analysis of circuit switching, baseline interconnection networksPublished by Association for Computing Machinery (ACM) ,1984
- Performance Analysis of a Packet Switch Based on Single-Buffered Banyan NetworkIEEE Journal on Selected Areas in Communications, 1983
- Packet Switching Interconnection Networks for Modular SystemsComputer, 1981
- Performance of Processor-Memory Interconnections for MultiprocessorsIEEE Transactions on Computers, 1981
- Interconnection Networks for SIMD MachinesComputer, 1979
- Study of multistage SIMD interconnection networksPublished by Association for Computing Machinery (ACM) ,1978
- Data Manipulating Functions in Parallel Processors and Their ImplementationsIEEE Transactions on Computers, 1974