New intra-gate-offset high-voltage thin-film transistor with misalignment immunity

Abstract
A new high-voltage thin-film transistor (HVTFT) which, for the first time, eliminates misalignment errors in the drain offset length is described. Unlike previous HVTFTs where the drain offset length is determined by the alignment of two masking layers, it is set in the new device by the separation of two gates defined with the same mask, and is therefore immune to alignment errors. The new intra-gate-offset (ITGO) scheme introduces no extra processing compared to conventional HVTFTs, and improves device uniformity and reproducibility, allowing a relaxed alignment tolerance on the normally critical n+ implant mask.

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