A compile-time scheduling heuristic for interconnection-constrained heterogeneous processor architectures
- 1 January 1993
- journal article
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Transactions on Parallel and Distributed Systems
- Vol. 4 (2) , 175-187
- https://doi.org/10.1109/71.207593
Abstract
No abstract availableThis publication has 11 references indexed in Scilit:
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