Low-temperature f.e.t. for low-power high-speed logic

17 March 1977

journal article
Published by Institution of Engineering and Technology (IET) in Electronics Letters

Vol. 13 (6) , 156-158
https://doi.org/10.1049/el:19770111

Abstract

A novel f.e.t. cooled to around 100 K is proposed. Detailed computer simulations support the conjecture of high-speed switching at low power levels with a power-delay product ≃ 10⁻¹⁴ J.

Keywords

100K
LOW POWER HIGH SPEED LOGIC
LOW TEMPERATURE FET
COMPUTER SIMULATIONS
HIGH SPEED SWITCHING
POWER DELAY PRODUCT